TY - JOUR
T1 - A Full-digital M-CAP Receiver with Synchronisation and Adaptive Blind Equalisation for Visible Light Communications
AU - Li, Xicong
AU - Ghassemlooy, Zabih
AU - Zvanovec, Stanislav
AU - Alves, Luis
AU - Figueiredo, Monica
AU - Zhang, Min
AU - Maravanchery Mana, Sreelal
AU - Jungnickel, Volker
AU - Chvojka, Petr
N1 - Funding information: Research funded by National Natural Science Foundation of China (NSFC 61975020.), European Cooperation in Science and Technology COST Action (NEWFOCUS CA19111), Horizon 2020 Research and Innovation Programme under the Marie Sklodowska-Curie grant agreement (764461 (VisIoN)).
PY - 2022/4/15
Y1 - 2022/4/15
N2 - With an emphasis on the real-time implementation of a practical carrier-less amplitude and phase (CAP) receiver for visible light communication (VLC), this paper proposes a full-digital architecture for the M-CAP receiver with synchronisation and adaptive blind equalisation. The architecture is mainly based on the observation that a CAP signal can be demodulated using a quadrature and amplitude (QAM) receiver with an added counterclockwise rotation operation. The proposed CAP receiver employs two digital phase-locked loops (DPLL) to realise the symbol timing and carrier synchronisation, which are the most critical issues in practical systems. With the constant modulus algorithm (CMA) offering the benefit of decoupling carrier and symbol timing synchronisation, the receiver can blindly equalise the distorted signal at the output of symbol timing synchronisation. Finally, the performance of 4/16/64-CAP receivers, which are designed using this architecture and operates at 80/160/240 Mbit/s through a low-pass light-emitting diode (LED) with a 3-dB bandwidth of 7 MHz cascaded with three measured optical wireless channels, is evaluated by Monte Carlo simulations. Results show that the receiver architecture can successfully solve the symbol timing and carrier synchronisation problems and mitigate inter-symbol interference caused by LED and/or wireless channels. The design framework for a full-digital CAP receiver has been laid out in this paper.
AB - With an emphasis on the real-time implementation of a practical carrier-less amplitude and phase (CAP) receiver for visible light communication (VLC), this paper proposes a full-digital architecture for the M-CAP receiver with synchronisation and adaptive blind equalisation. The architecture is mainly based on the observation that a CAP signal can be demodulated using a quadrature and amplitude (QAM) receiver with an added counterclockwise rotation operation. The proposed CAP receiver employs two digital phase-locked loops (DPLL) to realise the symbol timing and carrier synchronisation, which are the most critical issues in practical systems. With the constant modulus algorithm (CMA) offering the benefit of decoupling carrier and symbol timing synchronisation, the receiver can blindly equalise the distorted signal at the output of symbol timing synchronisation. Finally, the performance of 4/16/64-CAP receivers, which are designed using this architecture and operates at 80/160/240 Mbit/s through a low-pass light-emitting diode (LED) with a 3-dB bandwidth of 7 MHz cascaded with three measured optical wireless channels, is evaluated by Monte Carlo simulations. Results show that the receiver architecture can successfully solve the symbol timing and carrier synchronisation problems and mitigate inter-symbol interference caused by LED and/or wireless channels. The design framework for a full-digital CAP receiver has been laid out in this paper.
KW - blind equalisation
KW - CAP
KW - carrier synchronisation
KW - DSP
KW - symbol timing synchronisation
KW - synchronization
KW - VLC
KW - software-defined radio
UR - http://www.scopus.com/inward/record.url?scp=85121799861&partnerID=8YFLogxK
U2 - 10.1109/JLT.2021.3135468
DO - 10.1109/JLT.2021.3135468
M3 - Article
AN - SCOPUS:85121799861
SN - 0733-8724
VL - 40
SP - 2409
EP - 2426
JO - Journal of Lightwave Technology
JF - Journal of Lightwave Technology
IS - 8
ER -