With an emphasis on the real-time implementation of a practical carrier-less amplitude and phase (CAP) receiver for visible light communication (VLC), this paper proposes a full-digital architecture for the M-CAP receiver with synchronisation and adaptive blind equalisation. The architecture is mainly based on the observation that a CAP signal can be demodulated using a quadrature and amplitude (QAM) receiver with an added counterclockwise rotation operation. The proposed CAP receiver employs two digital phase-locked loops (DPLL) to realise the symbol timing and carrier synchronisation, which are the most critical issues in practical systems. With the constant modulus algorithm (CMA) offering the benefit of decoupling carrier and symbol timing synchronisation, the receiver can blindly equalise the distorted signal at the output of symbol timing synchronisation. Finally, the performance of 4/16/64-CAP receivers, which are designed using this architecture and operates at 80/160/240 Mbit/s through a low-pass light-emitting diode (LED) with a 3-dB bandwidth of 7 MHz cascaded with three measured optical wireless channels, is evaluated by Monte Carlo simulations. Results show that the receiver architecture can successfully solve the symbol timing and carrier synchronisation problems and mitigate inter-symbol interference caused by LED and/or wireless channels. The design framework for a full-digital CAP receiver has been laid out in this paper.