Anodic Ta2O5 for CMOS compatible low voltage electrowetting-on-dielectric device fabrication

Yifan Li, William Parkes, Les Haworth, Adam Stokes, K. Muir, P. Li, A. Collin, N. Hutcheon, Robert Henderson, Bruce Rae

Research output: Contribution to journalArticlepeer-review

51 Citations (Scopus)


This paper reports a CMOS compatible fabrication procedure that enables electrowetting-on-dielectric (EWOD) technology to be post-processed on foundry CMOS technology. With driving voltages less than 15 V it is believed to be the lowest reported driving voltage for any material system compatible with post-processing on completed integrated circuits wafers. The process architecture uses anodically grown tantalum pentoxide as a pinhole free high dielectric constant insulator with an overlying 16 nm layer of Teflon-AF®, which provides the hydrophobic surface for droplets manipulation. This stack provides a very robust dielectric, which maintains a sufficiently high capacitance per unit area for effective operation at a reduced voltage (15 V) which is more compatible with standard CMOS technology. The paper demonstrates that the sputtered tantalum layer used for the electrodes and the formation of the insulating dielectric can readily be integrated with both aluminium and copper interconnect used in foundry CMOS.
Original languageEnglish
Pages (from-to)1382-1387
JournalSolid-State Electronics
Issue number9
Publication statusPublished - 2008


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