Compact model based design space exploration for CMOS hall effect sensors

Ibrahim Kagan Aksoyak, Kaan Balaban, Hamdi Torun, Gunhan Dundar

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

This paper presents an analytical model for Hall Plates. The model includes the calculation of some key features such as Hall voltage, resolution, sensitivity, and signal-to-noise ratio (SNR) for different device geometries. The model is used to determine the device geometries for the best optimization parameters in the design of Hall plates. The model is validated with the measurements taken from a Hall Plate.

Original languageEnglish
Title of host publicationSMACD 2017 - 14th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781509050529
ISBN (Print)9781509050536
DOIs
Publication statusPublished - 17 Jul 2017
Externally publishedYes
Event14th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, SMACD 2017 - Giardini Naxos, Taormina, Italy
Duration: 12 Jun 201715 Jun 2017

Conference

Conference14th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, SMACD 2017
Country/TerritoryItaly
CityGiardini Naxos, Taormina
Period12/06/1715/06/17

Keywords

  • Hall plate
  • Hall voltage
  • resolution
  • sensitivity
  • signal to noise ratio

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