AIDA: Layout-aware analog circuit-level sizing with in-loop layout generation N Lourenço, R Martins, A Canelas, R Povoa, N Horta Integration 55, 316-329, 2016 | 35 | 2016 |

Automatic synthesis of RF front-end blocks using multi-objective evolutionary techniques R Povoa, I Bastos, N Lourenço, N Horta Integration 52, 243-252, 2016 | 34 | 2016 |

Floorplan-aware analog IC sizing and optimization based on topological constraints N Lourenço, A Canelas, R Póvoa, R Martins, N Horta Integration 48, 183-197, 2015 | 33 | 2015 |

AIDA: Robust layout-aware synthesis of analog ICs including sizing and layout generation R Martins, N Lourenço, A Canelas, R Póvoa, N Horta 2015 International Conference on Synthesis, Modeling, Analysis and …, 2015 | 32 | 2015 |

Single-stage amplifiers with gain enhancement and improved energy-efficiency employing voltage-combiners R Povoa, N Lourenço, N Horta, R Santos-Tavares, J Goes 2013 IFIP/IEEE 21st International Conference on Very Large Scale Integration …, 2013 | 22 | 2013 |

Two-step RF IC block synthesis with preoptimized inductors and full layout generation in-the-loop R Martins, N Lourenço, F Passos, R Póvoa, A Canelas, E Roca, ... IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2018 | 20 | 2018 |

LC-VCO automatic synthesis using multi-objective evolutionary techniques R Póvoa, R Lourenço, N Lourenço, A Canelas, R Martins, N Horta 2014 IEEE International Symposium on Circuits and Systems (ISCAS), 293-296, 2014 | 18 | 2014 |

Current-flow and current-density-aware multi-objective optimization of analog IC placement R Martins, R Povoa, N Lourenco, N Horta Integration 55, 295-306, 2016 | 16 | 2016 |

FUZYE: A Fuzzy -Means Analog IC Yield Optimization Using Evolutionary-Based Algorithms A Canelas, R Póvoa, R Martins, N Lourenço, J Guilherme, JP Carvalho, ... IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2018 | 14 | 2018 |

Single-stage OTA biased by voltage-combiners with enhanced performance using current starving R Povoa, N Lourenço, R Martins, A Canelas, N Horta, J Goes IEEE Transactions on Circuits and Systems II: Express Briefs 65 (11), 1599-1603, 2017 | 13 | 2017 |

Enhanced systematic design of a voltage controlled oscillator using a two-step optimization methodology F Passos, R Martins, N Lourenço, E Roca, R Povoa, A Canelas, ... Integration 63, 351-361, 2018 | 11 | 2018 |

Efficient yield optimization method using a variable K-Means algorithm for analog IC sizing A Canelas, R Martins, R Póvoa, N Lourenço, N Horta Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017 …, 2017 | 11 | 2017 |

Single-stage amplifier biased by voltage combiners with gain and energy-efficiency enhancement R Povoa, N Lourenço, R Martins, A Canelas, NCG Horta, J Goes IEEE Transactions on Circuits and Systems II: Express Briefs 65 (3), 266-270, 2017 | 11 | 2017 |

Yield optimization using k-means clustering algorithm to reduce Monte Carlo simulations A Canelas, R Martins, R Póvoa, N Lourenço, N Horta 2016 13th International Conference on Synthesis, Modeling, Analysis and …, 2016 | 11 | 2016 |

Grounded active inductors design optimization for fQmax= 14.2 GHz using a 130 nm CMOS technology M Pandey, A Canelas, R Póvoa, J Torres, JC Freire, N Lourenço, N Horta 2015 International Conference on Synthesis, Modeling, Analysis and …, 2015 | 8 | 2015 |

Using polynomial regression and artificial neural networks for reusable analog ic sizing N Lourenço, E Afacan, R Martins, F Passos, A Canelas, R Póvoa, N Horta, ... 2019 16th International Conference on Synthesis, Modeling, Analysis and …, 2019 | 7 | 2019 |

Artificial neural networks as an alternative for automatic analog IC placement D Guerra, A Canelas, R Póvoa, N Horta, N Lourenço, R Martins 2019 16th International Conference on Synthesis, Modeling, Analysis and …, 2019 | 7 | 2019 |

A new metaheuristc combining gradient models with NSGA-II to enhance analog IC synthesis F Rocha, N Lourenço, R Povoa, R Martins, N Horta 2013 IEEE Congress on Evolutionary Computation, 2781-2788, 2013 | 7 | 2013 |

Sub-μW Tow-Thomas based biquad filter with improved gain for biomedical applications R Póvoa, R Arya, A Canelas, F Passos, R Martins, N Lourenço, N Horta Microelectronics Journal 95, 104675, 2020 | 6 | 2020 |

On the exploration of promising analog IC designs via artificial neural networks N Lourenço, J Rosa, R Martins, H Aidos, A Canelas, R Póvoa, N Horta 2018 15th International Conference on Synthesis, Modeling, Analysis and …, 2018 | 6 | 2018 |