Harmonic analysis and improvement of a new solid state fault current limiter

Mohamed Mostafa Ramadan Ahmed, Ghanim Putrus, Li Ran, Lejun Xiao

Research output: Contribution to journalArticlepeer-review

35 Citations (Scopus)


This paper presents a harmonic study on a newly developed solid-state fault current limiter. Using this device, the supply voltage sag is reduced when a short-circuit fault occurs on a cable feeder in the downstream network, hence improving the power quality. The device will eventually isolate the faulted part from the healthy network. Harmonics caused by the fault current limiter are analyzed and a method is proposed to prevent undesirable harmonic interactions. Analytical and experimental results are compared with existing regulations. It is verified that, with precautions, the operation of the solid-state fault current limiter will not cause problems to either the supply network or the loads.
Original languageEnglish
Pages (from-to)1012-1019
JournalIEEE Transactions on Industry Applications
Issue number4
Publication statusPublished - Aug 2004


Dive into the research topics of 'Harmonic analysis and improvement of a new solid state fault current limiter'. Together they form a unique fingerprint.

Cite this