@inproceedings{a4188132b13942c3b39ab6f18902ee74,
title = "Investigating the Dynamic Performance of Power Semiconductors in Parallel Connection",
abstract = "The parallel connection of power semiconductors is generally used for higher current levels. However, due to the design variations in both power devices and associated electrical circuits (such as parasitic inductances, parasitic capacitance), devices in parallel may result in unmatched current, voltage and power losses, degrading their overall switching performance and reliability as a whole. In this paper, the in-circuit switching behavior of power devices in the parallel configuration and their impacting factors are investigated using an analytical electrical model, which allows the current sharing and voltage balance behavior can be analyzed easily by changing parasitic parameters. The analytical model was verified by LTspice and shows an excellent match. Simulation results shows that the uneven common source inductance, gate resistance and gate capacitance has the greatest influence on current sharing.",
keywords = "Analytical model, Parallel connection, SiC MOSFET",
author = "Jixuan Wei and Jiajun Yu and Kun Tan and Hongfei Chen and Haimeng Wu and Paul Lefley and Bing Ji",
year = "2022",
doi = "10.1007/978-981-19-1922-0\_4",
language = "English",
isbn = "9789811919213",
series = "Lecture Notes in Electrical Engineering",
publisher = "Springer",
pages = "35--45",
editor = "Cungang Hu and Wenping Cao and Pinjia Zhang and Zhenbin Zhang and Xi Tang",
booktitle = "Conference Proceedings of 2021 International Joint Conference on Energy, Electrical and Power Engineering - Power Electronics, Energy Storage and System Control in Energy and Electrical Power Systems",
address = "Germany",
note = "International Joint Conference on Energy, Electrical and Power Engineering, CoEEPE 2021 ; Conference date: 17-09-2021 Through 19-09-2021",
}