@inproceedings{016aeaede8724279a36aa74594fd860a,
title = "Performance Analysis of 9 Level Reduced Switch Cascaded Multilevel Inverter Using Phase Disposition",
abstract = "This paper presents a novel cascaded 9-level inverter with reduced number of switches based on a multilevel DC link inverter topology. It describes the variation in total harmonic distortion as the number of levels are increased. This topology requires fewer components when compared to conventional topologies. This work uses pulse width modulation technique with Phase Disposition Method using Triangular Multiple Carrier waves. The simulation results are carried out in SIMULINK/MATLAB Software.",
keywords = "Cascaded H Bridge Inverter, Modulation Index, Multilevel Inverter, Multiple Carrier Signals, Phase Disposition, Total harmonic Distortion",
author = "Bhanutej, \{J. N.\} and \{Tamil Maran\}, A. and L. Santhosh and Y. Wang and K. Busawon",
note = "Publisher Copyright: {\textcopyright} 2018 IEEE.; 7th IEEE International Conference on Computation of Power, Energy, Information and Communication, ICCPEIC 2018 ; Conference date: 28-03-2018 Through 29-03-2018",
year = "2018",
month = nov,
day = "5",
doi = "10.1109/ICCPEIC.2018.8525209",
language = "English",
series = "7th IEEE International Conference on Computation of Power, Energy, Information and Communication, ICCPEIC 2018",
publisher = "IEEE",
pages = "296--304",
booktitle = "7th IEEE International Conference on Computation of Power, Energy, Information and Communication, ICCPEIC 2018",
address = "United States",
}