TY - JOUR
T1 - SN-SEC: a secure wireless sensor platform with hardware cryptographic primitives
AU - Moh'd, Abidalrahman
AU - Aslam, Nauman
AU - Phillips, William
AU - Robertson, William
AU - Marzi, Hosein
PY - 2013
Y1 - 2013
N2 - Security was not considered when current wireless sensor nodes were designed. As a result, providing high level of security on current WSNs platforms is unattainable, especially against attacks based on key resolving and node compromise. In this paper, we scrutinize the security holes in current WSNs platforms and compare the main approaches to implementing their cryptographic primitives in terms of security, time, and energy efficiency. To secure these holes and provide more efficiency, we propose SN-SEC, a 32-bit RISC secure wireless sensor platform with hardware cryptographic primitives. The choice of cryptographic primitives for SN-SEC is based on their compatibility with the constrained nature of WSNs and their security. SN-SEC is implemented using very high-speed integrated circuit hardware description language. Experimental results using synthesis for Spartan-6 low-power FPGA show that the proposed design has a very reasonable computational time and energy consumption compared to well-known WSN processers.
AB - Security was not considered when current wireless sensor nodes were designed. As a result, providing high level of security on current WSNs platforms is unattainable, especially against attacks based on key resolving and node compromise. In this paper, we scrutinize the security holes in current WSNs platforms and compare the main approaches to implementing their cryptographic primitives in terms of security, time, and energy efficiency. To secure these holes and provide more efficiency, we propose SN-SEC, a 32-bit RISC secure wireless sensor platform with hardware cryptographic primitives. The choice of cryptographic primitives for SN-SEC is based on their compatibility with the constrained nature of WSNs and their security. SN-SEC is implemented using very high-speed integrated circuit hardware description language. Experimental results using synthesis for Spartan-6 low-power FPGA show that the proposed design has a very reasonable computational time and energy consumption compared to well-known WSN processers.
KW - Wireless sensor networks
KW - security platform
KW - advanced encryption standard
KW - elliptic curve cryptography
KW - secure hash algorithm
U2 - 10.1007/s00779-012-0563-9
DO - 10.1007/s00779-012-0563-9
M3 - Article
SN - 1617-4909
SN - 1617-4917
VL - 17
SP - 1051
EP - 1059
JO - Personal and Ubiquitous Computing
JF - Personal and Ubiquitous Computing
IS - 5
ER -