Threshold temperature scaling: Heuristic to address temperature and power issues in MPSoCs

Muhammad Naeem Shehzad*, Qaisar Bashir, Umer Farooq, Ghufran Ahmed, Mohsin Raza, Priyan Malarvizhi Kumar, Muhammad Khalid

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

5 Citations (Scopus)


In this article, we propose a scheduling based temperature and power-aware heuristic for multi-core systems. Instead of using a fixed value of temperature threshold in load balancing techniques, the proposed heuristic suggests adjusting the value of threshold temperature as a function of the workload. As the workload reduces, the value of the threshold is lowered accordingly and vice versa. Lowering the value of threshold temperature decreases the temperature peaks, temperature spatial, and temporal gradients. Furthermore, it also reduces the total power consumed by the processing unit. The effectiveness of the approach is evaluated in a simulation-based environment that includes a scheduling and a thermal modeling tool. For evaluation, the heuristic is integrated with a state of the art load balancing technique based on global scheduling and a comparison is performed with the popular thermal-aware techniques. The results analysis shows that the use of proposed heuristic lowers the temperature peak by up to 7 °C, temperature spatial gradients by up to 35%, temporal gradient by 65%, and power utilization by up to 5.5% when compared with the state-of-the-art thermal balancing techniques and predictive thermal-aware models.

Original languageEnglish
Article number103124
JournalMicroprocessors and Microsystems
Early online date16 May 2020
Publication statusPublished - 1 Sept 2020


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